1. Field of the Invention
The present invention relates to a method for manufacturing a power device, and more particularly, to a method for manufacturing a trench power device capable of increasing the channel density of MOS devices.
2. Description of the Prior Art
Power devices are typical semiconductor devices in power management applications, such as a switching power supply, a power control IC of a computer system or peripherals, a power supply of a backlight, motor controller, etc. Power devices can be various kinds of transistors, such as an insulated gate bipolar transistor (IGBT), a metal-oxide-semiconductor field effect transistor (MOSFET) and a bipolar junction transistor (BJT). With advantages of fewer power-consumption and faster switching-speed, the MOSFETs are widely adopted in various arts.
Furthermore, developments of trench MOSFETs become an important tendency, because trench MOSFETs can provide a lower electric resistance in conduction and a smaller device dimension, and can effectively control voltages with the fewer power-consumption.
As shown in FIG. 1, a trench power MOSFET 10 includes a substrate 12. An N-type light (N−) doped semiconductor layer 14 is formed in the substrate 12 by epitaxy. Subsequently, a first part 16 of a trench, a plurality of second parts 18 of the trench, a P-type body layer 20 and a plurality of N-type heavy (N+) doped the source regions 22 are formed in the semiconductor layer 14. The power device further includes a dielectric layer 24 and a metal layer 26 disposed on the semiconductor layer 14 in order. The dielectric layer 24 has a plurality of the contact plugs 28 and 30 therein for electrically connecting the metal layer 26 and the underlying trench power MOSFET 10. A gate oxide layer 32 is disposed on the top surface of the semiconductor layer 14, and sidewalls and bottoms of the first and second parts 16 and 18 of the trench. In addition, a poly-silicon material 34 fills the first and second parts 16 and 18 of the trench, and function as the gate of the trench power MOSFET 10. The semiconductor layer 14 further includes an insulating ring (not shown in the drawings) therein. The insulating ring surrounds the trench power MOSFET 10 for electrically isolating the trench power MOSFET 10 from other devices or elements, and for defining the position of the active region.
The desire for ever more compact electronic devices has pushed for size reductions in integrated circuits. Therefore, higher integrations and higher densities are developed continuously. However, the layout design for the prior trench power MOSFET 10 structure already has its established design rules. For example, one of the design rules is that the distance between the contact plug 30 and the near second part 18 of the trench must be larger than a predetermined value to ensure the normal performance of the trench power MOSFET 10, and to reserve spaces for an allowable misalignment of lithography processes. As a result, the distance between the adjacent second parts 18 of the trench is limited by the design rules of the trench power MOSFET 10, and therefore cannot be reduced boundlessly. For instance, the designed width of each second part 18 of the trench is larger than 0.3 micrometer, and the designed distance between the adjacent second parts 18 of the trench is larger than 1.0 micrometer in the design rules. However, the design rules for ensuring the performance therefore restricts device integrations and channel densities of the trench power MOSFET 10, and limits the development of the trench power MOSFET 10.